This summer school explores the changing face of computer systems and will provide you with new programming skills in getting the most from the current trend to multi-core architecture. Technology constrains mean it is no longer feasible to increase clock rates in newer generations of processors. Instead Moore's law now dictates the doubling of the number of cores in each new generation of processor chip. Multi-core architecture is now common in both standard CPUs (central processing unit) and in GPUs (graphics processing unit).
During this week you will be introduced to new concepts in concurrent programming, introduced to new languages and you will get to grips with programming hundreds of cores in several different architectures.
The summer school showcases the research that underpins the Masters in Computer Science offered by the two Universities in Amsterdam.
If you have any questions, don't hesitate to send an email to Floris Klaver.
Attendance is limited to 25 people. It is therefore imperative that you send you intent to participate as soon as possible to Floris Klaver. Admissions close on June 25th. Include the following information:
We will evaluate all requests and judge them partially on your enthusiasm. When you really love to program, show it in your application!
We will be at the Science Park complex of the University of Amsterdam (map). You can easily reach the Science Park by train (stations Science Park, Amstel or Muiderpoort). If you come by car you will have to pay, or put it in Diemen for free and take the train for one stop.
To be on time you could take the train from Utrecht at 8:40, from The Hague HS 8:26, Rotterdam 8:08, Eindhoven 7:32, Heerlen 6:23, Enschede 6:57, Almere 9:10, Alkmaar 8:26, Groningen 6:44.
But when you come from far, or from abroad, we can arrange a flat for you. The flats are only 15 minutes from the university by public transport. If you need this, inform us soon so we can keep the flat for you!
This week will cost you € 25 including lunch, 1 dinner, and some other social activities. Professionals that already have a bachelor's or master's degree pay € 700.
Housing:
The summerschool is arranged over 5 days and has the following schedule. The first day sets the scene and provides a all the background you require. The core of the course on days 2, 3 and 4 will be split between lectures in the morning and hands on practical sessions in the afternoons. During day 5 we give you an opportunity to wrap up the lab work and present your achievements.
Chris Jesshope leads the Computer Systems Architecture group at UvA, where his research is focussed on how to make multi-cores mainstream. He has 30 years of teaching experience mostly in computer architecture and 35 years of research underpinning that in the area of parallel computing. Jointly with the late Professor Hockney, he co-authored the first book published on the subject of parallel computers.
Dr Clemens Grelck is an Assistant Professor in the Computer Systems Architecture group at UvA, where he mainly teaches Concurrent Programming and Compiler Construction. His research is on the design and implementation of high-level programming languages for parallel computing. Jointly with Sven-Bodo Scholz from the University of Hertfordshire he runs the Single Assignment C project.
Rob van Nieuwpoort is a postdoc in the Computer Systems group at the Vrije Universiteit of Amsterdam. He also works as a postdoc at Astron, the Netherlands foundation for radio astronomy. He performs multi-disciplinary research, on the boundaries of radio astronomy and computer science. At Astron, he works on the LOFAR telescope, and on applying many-core technology to the field of radio astronomy.
Raphael Poss is a researcher in the Computer Systems Architecture group at UvA, where he focusses on integrating fine-grained dataflow semantics to existing software stacks. He performs multi-disciplinary research, between chip architecture design, compiler construction and operating system design. Jointly with Mike Lankamp, he designed and maintains the Microgrid Platform for parallel architecture research and education.
Lecturers: Prof. Chris Jesshope and Dr. Clemens Grelck
Day 1 provides an introduction to concurrent systems, it will give reasons why we are being forced down the multi-core path, introduce basic concepts in concurrency and identify various pitfalls to concurrent programming. Lectures will also be given that are designed to give students an advanced knowledge of programming in C. In particular students will be introduced to cost intuitions in both accessing data and structuring programs, as these issues can become much more important when programming concurrent systems.
Chris Jesshope @ CSA
Clemens Grelck @ CSA
Assignment 1
Assigment 1 files
UNIX basics
Lecturer: Dr. Rob van Nieuwpoort
Graphics processing units (GPUs) are massively parallel architectures. They have hundreds to thousands of cores, and run 10.000-100.000 threads simultaneously. They have seen a large increase in their popularity as a suitable platform for high-performance computing recently. Therefore, the second day of the course is dedicated to NVIDIA and ATI GPUs and their programming. The discussion will focus on high-performance applications for GPUs, and their implementation using CUDA, the proprietary NVIDIA solution. We also discuss a portable and open standard for programming many-core devices: OpenCL.
The Cuda Zone
OpenCL
Rob van Nieuwpoort @ VU Amsterdam
GPGPU slides
GPGPU hands on
code
Lecturers: Prof. Chris Jesshope and Raphael Poss
Day 3 will introduce you to programming a general-purpose, many-core architecture. This is based on research from the University of Amsterdam where we have developed a software emulation of a research architecture that supports fine-grain concurrent threads in its instruction set.
Lecturer: Dr. Clemens Grelck
Day 4 will introduce you to an alternative to low-level concurrent programming: SAC (Single Assignment C) is a high-level functional programming language with a clear focus on array processing. The philosophy behind SAC is to support programmers in expressing algorithms in an implicitly data parallel style, but to leave as many operational decisions as possible to the compiler and the runtime system. Examples are the memory management for arrays, which is completely automatic, but likewise the generation of executable code, which currently supports standard multicore multiprocessor systems, CUDA graphics cards and the UvA MicroGrid architecture.
Day 5 will allow you to wrap up any of your programming experiments and to present you results and conclusions to the class.